Notes · ElectronicsUK · A-Levels

Timing circuits

Timing circuits create defined delays and oscillations from the charging and discharging of a capacitor through a resistor. This chapter develops the RC time constant and its charge and discharge equations, the Schmitt trigger and its hysteresis, and the 555 timer in its monostable and astable modes, with the standard pulse-width and frequency formulae.

4 sections~15 min reading time3 competenciesLevel Standard 2 · Advanced 2

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Exam profile

AO1 · Describe RC charging and discharging, the Schmitt trigger, and the 555 monostable and astable circuits.AO2 · Calculate the time constant, capacitor voltages, monostable pulse width and astable frequency and mark-space ratio.AO3 · Design a timer or oscillator to a specification and evaluate its accuracy and stability.

Operators:describecalculatedeterminedesignsketchanalyseevaluate

basic level

At AS the focus is the RC time constant and charge/discharge behaviour and the idea of a delay.

higher level

The full A-Level develops the Schmitt trigger, and the 555 monostable and astable with quantitative pulse-width, frequency and mark-space calculations.

Depth

Text

Contents · 4 sections

Timing circuits

RC charge, discharge and the time constant#

StandardWJEC/Eduqas A Level Electronics — Unit 1 Analogue Electronics (RC timing)

Capacitor charge and discharge curves

Fig. 1Charge (rising) and discharge (falling) for

V_0 = 5\,\text{V}

and

\tau = RC = 1

unit. At one time constant the charging curve reaches

63\%

(

3.16\,\text{V}

) and the discharging curve

37\%

(

1.84\,\text{V}

When a capacitor is charged through a resistor from a supply, it does not charge instantly: the resistor limits the current, so the capacitor voltage rises gradually along an exponential curve,

V = V_0(1 - e^{-t/RC})

. The rise is steep at first, when the voltage difference driving the current is largest, and flattens as the capacitor approaches the supply voltage. This shape is the signature of every RC timing circuit and the thing you must be able to sketch and interpret.

The product

\tau = RC

is the time constant, measured in seconds when

R

is in ohms and

C

in farads. It sets the timescale of the whole process: after one time constant the capacitor has charged to

1 - 1/e \approx 63\%

of the supply, after two to about

86\%

, and after five time constants to over

99\%

— at which point it is taken to be fully charged. The '

5RC

rule' — that charging or discharging is essentially complete after five time constants — is the standard practical benchmark.

Discharging is the mirror image. A charged capacitor releasing through a resistor follows

V = V_0 e^{-t/RC}

, falling to about

37\%

of its initial voltage after one time constant and to under

1\%

after five. The same time constant governs both charge and discharge, so doubling either the resistance or the capacitance doubles the delay. This direct, calculable relationship between component values and time is what makes RC networks the basis of every analogue timer.

To design a delay you simply choose

R

and

C

so that

RC

gives the wanted timescale, then use the charge equation to find the exact time to reach a particular threshold voltage. Rearranging

V = V_0(1 - e^{-t/RC})

for

t

involves a natural logarithm, so these questions test both the exponential model and confident use of logs. A common target is the time to reach a switching threshold, such as the two-thirds level that trips a 555 timer.

The RC network is the same circuit as the low-pass filter of the AC chapter, seen in the time domain rather than the frequency domain: a fast change is slowed (the time-domain view) exactly because high frequencies are attenuated (the frequency-domain view). This deep connection — that a short time constant means a wide bandwidth and a long one a narrow bandwidth — ties timing and filtering together, and explains why the same

RC

product appears in both.

\tau = RC

Time constant

In seconds when R is in ohms and C in farads.

V = V_0\left(1 - e^{-t/RC}\right) \ \text{(charge)}, \quad V = V_0\,e^{-t/RC} \ \text{(discharge)}

Charge and discharge

Exponential rise to the supply, or exponential fall to zero.

Worked example

Charging time to a threshold

A $100\,\mu\text{F}$ capacitor charges through a $10\,\text{k}\Omega$ resistor from a $6.0\,\text{V}$ supply. Find the time constant, the voltage after $2.0\,\text{s}$ , and the time to reach $4.0\,\text{V}$ .

Time constant
$\tau = RC = 10000 \times 100\times 10^{-6} = 1.0\,\text{s}$ .
Voltage after 2 s
$V = 6.0(1 - e^{-2.0/1.0}) = 6.0(1 - 0.135) = 6.0 \times 0.865 = 5.19\,\text{V}$ .
Time to reach 4.0 V
Rearrange: $e^{-t/\tau} = 1 - V/V_0 = 1 - 4.0/6.0 = 0.333$ , so $t = -\tau\ln(0.333) = -1.0 \times (-1.10) = 1.10\,\text{s}$ .
$t = -RC\,\ln\!\left(1 - \dfrac{V}{V_0}\right) = -\ln(0.333) = 1.10\,\text{s}$

Result: $\tau = 1.0\,\text{s}$ ; the capacitor reaches $5.19\,\text{V}$ after $2.0\,\text{s}$ and reaches $4.0\,\text{V}$ after $1.10\,\text{s}$ .

Typical mistakes

Muddling the charge equation ( $1 - e^{-t/RC}$ ) with the discharge equation ( $e^{-t/RC}$ ).
Forgetting to convert microfarads and kilohms consistently, giving a time constant that is out by a factor of a thousand.

Active revision

Active recall

Recall the key points — then reveal.

Sources: WJEC/Eduqas GCE Electronics specification (WJEC / Eduqas)

The Schmitt trigger#

StandardWJEC/Eduqas A Level Electronics — Unit 3 Analogue Design (Schmitt trigger)

Schmitt trigger response to a rising and falling input

Fig. 2The input (triangle, lower trace) crosses

V_{T+}=3.3\,\text{V}

going up and

V_{T-}=1.7\,\text{V}

coming down; the output (upper trace) switches at these two different levels — hysteresis.

A plain comparator has a single switching threshold, which is a problem for a slowly changing or noisy input: as the signal dithers around that one level, the output chatters rapidly between high and low. The Schmitt trigger cures this by having two thresholds instead of one — an upper threshold

V_{T+}

at which the output switches as the input rises, and a lower threshold

V_{T-}

at which it switches back as the input falls. The gap between them is called hysteresis.

The mechanism is positive feedback: a fraction of the output is fed back to the input, so that once the output switches, it shifts the threshold in a direction that reinforces the switch. This makes the transition snap cleanly and, crucially, moves the threshold away from the input, so the input must now travel all the way to the other threshold before the output can switch back. The transfer characteristic is therefore a rectangular loop rather than a single step.

Hysteresis gives noise immunity. Once the output has switched high at

V_{T+}

, small noise on the input cannot switch it back unless the input falls all the way below

V_{T-}

. As long as the noise amplitude is smaller than the hysteresis gap

V_{T+} - V_{T-}

, the output stays clean and switches exactly once per genuine crossing. This is why a Schmitt trigger is the standard way to clean up a slow or noisy signal into a crisp digital edge.

The Schmitt trigger also turns a slowly varying analogue waveform into a square wave, and is used to square up the ramp of an RC charging circuit — which is exactly how the 555 timer generates its oscillation. Common uses include conditioning the output of a sensor whose signal changes slowly, debouncing, and providing the clean edges a counter or flip-flop needs. Recognising a slow or noisy input as a job for a Schmitt trigger is a practical design instinct the examiner rewards.

Quantitatively, the two thresholds are set by the feedback resistor ratio and the supply, and the hysteresis is simply their difference. A wider hysteresis gives greater noise immunity but makes the trigger less sensitive to small genuine changes, so the designer chooses the gap to be comfortably larger than the expected noise but no larger than necessary. This trade-off between immunity and sensitivity is the heart of any Schmitt-trigger design question.

V_H = V_{T+} - V_{T-}

Hysteresis

The gap between the upper and lower switching thresholds; sets the noise immunity.

Worked example

Hysteresis and noise rejection

A Schmitt trigger conditioning a sensor signal has $V_{T+} = 3.3\,\text{V}$ and $V_{T-} = 1.7\,\text{V}$ . Find the hysteresis and explain why a $1.0\,\text{V}$ peak noise on the input cannot cause false switching once the output is high.

Hysteresis
$V_H = V_{T+} - V_{T-} = 3.3 - 1.7 = 1.6\,\text{V}$ .
Noise margin
Once the output is high, the input must fall below $V_{T-}=1.7\,\text{V}$ to switch it back. If the input sits near $V_{T+}=3.3\,\text{V}$ , a $1.0\,\text{V}$ dip only reaches $2.3\,\text{V}$ — still above $1.7\,\text{V}$ .
Conclusion
Because the $1.0\,\text{V}$ noise is smaller than the $1.6\,\text{V}$ hysteresis, it cannot carry the input across the lower threshold, so the output stays clean.

Result: The hysteresis is $1.6\,\text{V}$ ; noise up to that amplitude is rejected, so a $1.0\,\text{V}$ disturbance causes no false switching.

Typical mistakes

Drawing a single threshold — a Schmitt trigger has two, one for rising and one for falling input.
Assuming noise smaller than the hysteresis can still cause switching — it cannot, which is the whole point.

Active revision

A Schmitt trigger has $V_{T+} = 3.3\,\text{V}$ and $V_{T-} = 1.7\,\text{V}$ . State the hysteresis and the largest input noise amplitude it can reject once the output is high.

Active recall

Recall the key points — then reveal.

Sources: WJEC/Eduqas GCE Electronics specification (WJEC / Eduqas)

The 555 monostable#

AdvancedWJEC/Eduqas A Level Electronics — Unit 1/Unit 3 (555 monostable)

Internal blocks of the 555 timer

Fig. 3Inside the 555: the trigger and threshold comparators (at one-third and two-thirds of the supply) set and reset the flip-flop, which drives the output and the discharge transistor.

The 555 timer is an integrated circuit that packages two comparators, an SR flip-flop, a discharge transistor and an output stage around an external RC network — a complete timing system on a chip. Internally, a resistor chain sets two reference levels at one-third and two-thirds of the supply; the lower one feeds the trigger comparator and the upper one the threshold comparator, and their outputs set and reset the flip-flop that drives the output. All the timing behaviour comes from how the external capacitor charges and discharges between these two fixed levels.

In monostable mode the 555 produces a single output pulse of well-defined length each time it is triggered. At rest the output is low and the capacitor is held discharged. A brief trigger pulse (taking the trigger input below one-third of the supply) sets the flip-flop, the output goes high, and the capacitor begins to charge through the external resistor

R

. When the capacitor reaches two-thirds of the supply, the threshold comparator resets the flip-flop, the output returns low and the capacitor is discharged, ready for the next trigger.

The pulse width depends only on the external

R

and

C

: the time for the capacitor to charge from zero to two-thirds of the supply through

R

t = 1.1\,RC

. The factor

1.1

comes from the natural logarithm involved in charging to the two-thirds level (

\ln 3 \approx 1.1

) and is independent of the supply voltage, which is a great practical advantage — the pulse length does not drift as the battery runs down. Choosing

R

and

C

to set a required pulse width is the core monostable design calculation.

The monostable is used wherever a fixed-length pulse is needed on demand: a timed light that stays on for a set period after a button press, a delay before an action, or a pulse-stretcher that turns a brief input into a longer, usable one. Because it has one stable state (output low) and one temporary state (output high for

1.1RC

), it is called monostable — it always returns to rest after its single timed pulse.

As a system block, the monostable is a one-shot timer: input a trigger, output a pulse of programmed length. It combines the RC charging of the first section (which sets the time) with the comparator-and-flip-flop decision logic (which starts and stops the pulse cleanly), and so ties together the analogue and digital ideas of the course. Being able to calculate the pulse width and to design

R

and

C

for a target time is a standard, high-value exam skill.

t = 1.1\,RC

Monostable pulse width

Time for the capacitor to charge to two-thirds of the supply; the factor is ln 3.

Worked example

Designing a one-second monostable

Design a 555 monostable to produce a $1.0\,\text{s}$ pulse using a $10\,\mu\text{F}$ capacitor. Find the resistor value and check the pulse width.

Rearrange for R
$t = 1.1RC$ , so $R = t/(1.1C) = 1.0/(1.1 \times 10\times 10^{-6}) = 1.0/(1.1\times 10^{-5}) = 90910\,\Omega$ .
Choose a value
The nearest preferred value is $91\,\text{k}\Omega$ .
$R = \dfrac{t}{1.1C} = \dfrac{1.0}{1.1 \times 10\times 10^{-6}} \approx 91\,\text{k}\Omega$
Check
With $R = 91\,\text{k}\Omega$ : $t = 1.1 \times 91000 \times 10\times 10^{-6} = 1.00\,\text{s}$ , as required.

Result: A $91\,\text{k}\Omega$ resistor with the $10\,\mu\text{F}$ capacitor gives a $1.0\,\text{s}$ pulse; the pulse length is fixed once triggered, regardless of how long the trigger is held.

Typical mistakes

Using the astable frequency formula for a monostable, or omitting the factor $1.1$ .
Thinking the pulse width depends on the supply voltage — it does not, because both thresholds scale with the supply.

Active revision

Design a 555 monostable to give a $1.0\,\text{s}$ output pulse using a $10\,\mu\text{F}$ capacitor. Find the required resistor, and state what happens if the trigger is held low for longer than the pulse.

Active recall

Recall the key points — then reveal.

Sources: WJEC/Eduqas GCE Electronics specification (WJEC / Eduqas)

The 555 astable#

AdvancedWJEC/Eduqas A Level Electronics — Unit 1/Unit 3 (555 astable)

555 astable output waveform

Fig. 4The astable output: high for

t_1 = 0.7(R_1+R_2)C

while charging and low for

t_2 = 0.7R_2C

while discharging, so the high time is longer.

In astable mode the 555 has no stable state: it oscillates continuously, producing a square-wave output with no external trigger. The external network is two resistors,

R_1

and

R_2

, and a capacitor

C

. The capacitor charges through

R_1

and

R_2

in series until it reaches two-thirds of the supply, then discharges through

R_2

alone until it falls to one-third, at which point it charges again — endlessly. The output is high while charging and low while discharging.

Because charging is through

R_1 + R_2

but discharging is only through

R_2

, the high and low times are different. The output stays high for

t_1 = 0.7(R_1 + R_2)C

and low for

t_2 = 0.7R_2C

. The total period is their sum, and the frequency of oscillation is

f = 1.44/((R_1 + 2R_2)C)

. These formulae let you design an oscillator to any audio or timing frequency simply by choosing the two resistors and the capacitor.

The ratio of the high time to the low time is the mark-space ratio,

t_1/t_2 = (R_1 + R_2)/R_2

. Because

t_1

is always at least as long as

t_2

(the charging path includes the discharging path plus

R_1

), the standard 555 astable can never produce a mark-space ratio below one — its output is high for at least half of each cycle. Achieving an even (50:50) square wave or a shorter high time requires extra components such as a diode across

R_2

, a favourite design-and-evaluate question.

The astable is the workhorse oscillator of the course. It generates the clock for counters and sequential logic, the tone for a buzzer or a simple synthesiser, and the flashing drive for a warning light. Its frequency is set by cheap passive components and is reasonably stable, and — like the monostable — it is independent of the supply voltage because both switching thresholds scale together. This supply-independence is a recurring reason the 555 is chosen over cruder RC oscillators.

Designing an astable ties the whole timing chapter together: the RC charge and discharge equations of the first section set the two times, the two-thirds and one-third thresholds come from the comparators inside the 555, and the resulting square wave is exactly the clean, well-defined signal that the digital chapters need. Being able to calculate frequency, period and mark-space ratio, and to choose components for a specification, is the culminating skill of the timing unit.

f = \dfrac{1.44}{(R_1 + 2R_2)\,C}

Astable frequency

Set by the two resistors and the capacitor; independent of supply voltage.

t_1 = 0.7(R_1 + R_2)C, \quad t_2 = 0.7R_2C, \quad \dfrac{t_1}{t_2} = \dfrac{R_1 + R_2}{R_2}

High/low times and mark-space

Charge through R1+R2, discharge through R2 alone.

Worked example

Analysing a 555 astable

A 555 astable uses $R_1 = 1.0\,\text{k}\Omega$ , $R_2 = 6.8\,\text{k}\Omega$ and $C = 100\,\text{nF}$ . Find the frequency, the high and low times and the mark-space ratio.

Frequency
$R_1 + 2R_2 = 1000 + 2(6800) = 14600\,\Omega$ . $f = 1.44/(14600 \times 100\times 10^{-9}) = 1.44/(1.46\times 10^{-3}) = 986\,\text{Hz}$ .
$f = \dfrac{1.44}{14600 \times 100\times 10^{-9}} \approx 986\,\text{Hz}$
High and low times
$t_1 = 0.7(R_1+R_2)C = 0.7 \times 7800 \times 100\times 10^{-9} = 0.546\,\text{ms}$ ; $t_2 = 0.7 R_2 C = 0.7 \times 6800 \times 100\times 10^{-9} = 0.476\,\text{ms}$ .
Mark-space ratio
$t_1/t_2 = (R_1+R_2)/R_2 = 7800/6800 = 1.15$ .

Result: $f \approx 986\,\text{Hz}$ , high time $0.55\,\text{ms}$ , low time $0.48\,\text{ms}$ , mark-space ratio $1.15$ — the output is high slightly longer than it is low.

Typical mistakes

Using $R_2$ alone (or $R_1 + R_2$ ) in the frequency formula instead of $R_1 + 2R_2$ .
Assuming the output is a symmetrical square wave — the high time is longer unless extra components are added.

Active revision

A 555 astable uses $R_1 = 1.0\,\text{k}\Omega$ , $R_2 = 6.8\,\text{k}\Omega$ and $C = 100\,\text{nF}$ . Calculate the frequency, the high and low times and the mark-space ratio.

Active recall

Recall the key points — then reveal.

Sources: WJEC/Eduqas GCE Electronics specification (WJEC / Eduqas)

References & sources

Sources

WJEC / Eduqas

WJEC/Eduqas GCE Electronics specification

Timing circuits

4 sections~15 min reading time3 competenciesLevel Standard 2 · Advanced 2

Timing circuits

Key points

Charging time to a threshold

Key points

Hysteresis and noise rejection

Key points

Designing a one-second monostable

Key points

Analysing a 555 astable

Sources

Timing circuits

Key points

Charging time to a threshold

Key points

Hysteresis and noise rejection

Key points

Designing a one-second monostable

Key points

Analysing a 555 astable

Sources